Block-based SRAM architecture and thermal-aware memory mappings for three-dimensional channel decoding systems

Shu-Yen Lin, Cheng-Hung Lin, Ho-Yun Su
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Abstract

In this work, the 3D block-based SRAM architecture and the thermal-aware memory mappings are proposed for the 3D channel decoding systems. The 3D block-based SRAM is proposed by analyzing the memory utilization with different sizes of the memory elements. Based on this architecture, the thermal-aware memory mappings are discussed by minimizing the vertical stacking of the active MEs and avoiding the successive access of the MEs. In our experiments, the peak temperature can be reduced by 2.6°C ~ 22.2°C compared to the worst mappings.
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三维信道解码系统的基于块的SRAM结构和热感知存储器映射
在这项工作中,提出了基于3D块的SRAM架构和热感知存储器映射用于3D信道解码系统。通过分析不同存储单元大小的内存利用率,提出了基于三维块的SRAM。在此基础上,通过最小化活动微处理器的垂直堆叠和避免微处理器的连续访问,讨论了热感知内存映射。在我们的实验中,与最坏的映射相比,峰值温度可以降低2.6°C ~ 22.2°C。
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