{"title":"Analog Fault Simulation - a Hot Topic!","authors":"S. Sunter","doi":"10.1109/ETS48528.2020.9131581","DOIUrl":null,"url":null,"abstract":"Automotive applications are driving the need for a systematic way to decrease analog test escape rates to 0 DPPM, while providing functional safety. This tutorial briefly reviews the history of analog fault simulation, from academic simulation of basic shorts and opens, to the advent of industrial analog defect/fault simulators. Then it addresses the two biggest problems: no industry-accepted fault model, and impractically long simulation time. The solutions are the proposed IEEE P2427 standard for analog defect coverage, for which a brief summary of its requirements is provided, and a variety of methods to reduce total simulation time, such as defect collapsing, simulating only the most likely defects or likelihood-weighted randomly selection of defects, and parallel simulation.","PeriodicalId":267309,"journal":{"name":"2020 IEEE European Test Symposium (ETS)","volume":"70 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2020-05-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"13","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2020 IEEE European Test Symposium (ETS)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ETS48528.2020.9131581","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 13
Abstract
Automotive applications are driving the need for a systematic way to decrease analog test escape rates to 0 DPPM, while providing functional safety. This tutorial briefly reviews the history of analog fault simulation, from academic simulation of basic shorts and opens, to the advent of industrial analog defect/fault simulators. Then it addresses the two biggest problems: no industry-accepted fault model, and impractically long simulation time. The solutions are the proposed IEEE P2427 standard for analog defect coverage, for which a brief summary of its requirements is provided, and a variety of methods to reduce total simulation time, such as defect collapsing, simulating only the most likely defects or likelihood-weighted randomly selection of defects, and parallel simulation.