Energy Scalable Brent Kung Adder with Non-Zeroing Bit Truncation

Abstract

Approximate addition is a methodology for optimizing energy consumption and performance outcomes by enhancing the design metrics of the adders. As a method to dynamically optimize quality and energy, bit truncation has been addressed in the subsequent art. This paper presents a bit truncation approach to produce more progressive quality deterioration in contrast to existing truncation procedures. This leads to reduction in energy utilization at a certain quality target. Compared to the prior non-zeroing bit truncation approaches, the proposed method significantly outperformed in terms of Area, Power, and Delay using the Brent kung adder. The proposed technique is simulated in Xilinx Vivado to obtain performance metrics, resulting in a 31.75% reduction in delay.