A VLSI architecture for image sequence segmentation using edge fusion

Abstract

We propose a segmentation scheme and its VLSI edge fusion architecture for image sequences which provides initial region information for the semantic object representation of image sequences. The proposed scheme incorporates static and dynamic features simultaneously in one scheme. The segmentation results of both gray level image sequences and color image sequences are evaluated using a evaluation metric. Also, based on complexity analysis of the segmentation scheme, the edge fusion is the bottleneck of fast image sequence segmentation. The proposed VLSI architecture makes it possible to the image sequence segmentation in real-time.