Low Cost Parallel Adaptive Filter Structures

Chao Cheng, K. Parhi
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引用次数: 2

Abstract

In this paper, we present two parallel LMS adaptive filtering algorithms with low hardware. The proposed parallel algorithm 1 doesn't alter the input-output behavior and saves large amount of hardware cost of previous designs, especially when the parallelism level is high. For example, it saves 68.4% of the multiplications and 4.7% of the additions, of those of prior fast parallel adaptive filtering algorithms when parallelism level is 72 and the filter length N is large. The proposed parallel algorithm 2, while maintaining the same performance, can further save 5.56% to 12.5% of the multipliers and 8.54% to 24.9% of the additions when the level of parallelism varies from 3 to 72
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低成本并行自适应滤波器结构
本文提出了两种低硬件的并行LMS自适应滤波算法。本文提出的并行算法1在不改变输入输出行为的情况下,节省了大量的硬件成本,特别是在并行度较高的情况下。例如,当并行度为72且滤波器长度N较大时,该算法比现有快速并行自适应滤波算法节省了68.4%的乘法运算和4.7%的加法运算。提出的并行算法2在保持相同性能的情况下,当并行度从3到72变化时,可进一步节省5.56% ~ 12.5%的乘数和8.54% ~ 24.9%的加法
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