Hardware/Software Codesign of Resource Constrained Real-Time Systems

Chia-Cheng Lo, Jung-Guan Luo, Ming-Der Shieh
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Abstract

System-level design methods can provide a systematic and effective way of evaluating various design options, thus shortening the product development time. This paper relaxes the HC algorithm by considering the K best candidates in each clustering iteration to alleviate the possibility of being trapped in local minimum during hardware/software (HW/SW) partition. We also present an architecture mapping algorithm together with the defined sensitivity measure to further reduce the hardware requirement. Simulation results show that the complexity of exploration time can be greatly reduced with only little performance loss as compared to the exhaustive search. The proposed algorithm can thus provide a good compromise between exploration time and accuracy.
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资源受限实时系统的软硬件协同设计
系统级设计方法可以提供一种系统有效的方法来评估各种设计方案,从而缩短产品开发时间。本文通过在每次聚类迭代中考虑K个最佳候选者来放宽HC算法,以减轻在硬件/软件(HW/SW)划分时陷入局部最小值的可能性。我们还提出了一种架构映射算法和定义的灵敏度度量,以进一步降低硬件要求。仿真结果表明,与穷举搜索相比,该方法可以大大降低搜索时间的复杂度,而性能损失很小。因此,该算法可以在探测时间和精度之间提供一个很好的折衷。
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