A LNA Design for WCDMA Application In 0.18um CMOS Process

Xiao-Dong Wang, Jia-you Song
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引用次数: 1

Abstract

This paper presents a design and optimization method for low noise amplifiers (LNAs), based on the minimization of the noise figure for a given power consumption. The LNA design is realized through the 0.18 mum CMOS process with the operating frequency at 2.14GHz. Simulation results show that the amplifier draws 5.36 mA from a given 1.8 V supply voltage while keeping the input/output impedance matched to 50 Omega. Furthermore, the circuit behaviors with 0.655 dB noise figure, gain of 16.64 dB, 1 dB compression point of about -12 dBm and IIP3 of 6 dBm.
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基于0.18um CMOS工艺的WCDMA应用LNA设计
本文提出了一种基于给定功耗下噪声系数最小化的低噪声放大器(LNAs)设计和优化方法。LNA设计通过0.18 μ m CMOS工艺实现,工作频率为2.14GHz。仿真结果表明,在给定的1.8 V电源电压下,放大器在保持输入/输出阻抗匹配为50 ω的情况下,可以吸收5.36 mA。电路的噪声系数为0.655 dB,增益为16.64 dB, 1 dB压缩点约为-12 dBm, IIP3为6 dBm。
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