Regional Congestion Aware Odd Even Routing with Fair Arbitration for Network on Chip

Abstract

Advancement in current VLSI technologies increases the number of cores or Intellectual Properties (IPs) integrated in System on Chip (SoC) and this results in many-core and multi-core SoCs. Traditional interconnects used in these SoCs introduce multiple processing and traverse delays. In SoC, Network on Chip (NoC) overcomes the problem faced with traditional interconnect and provides an effective and efficient data transfer between the cores. Further in NoC, there is a growing need for routing algorithms which are flexible enough to provide minimal paths and congestion awareness. In this paper, a Regional Congestion Aware Odd Even routing algorithm with Fair Arbitration (RCAOE-FA) based on adaptive Odd Even (OE) turn model is proposed which provides deadlock freedom, on a 2D mesh topology based NoC. The proposed algorithm is implemented and analyzed using the cycle accurate simulator for four different traffic patterns namely – Random, Transpose-1, Transpose-2 and Bit-Reversal. The results of the same are compared with the predecessor algorithm under all the aforementioned traffic patterns. After implementing the algorithm it is observed that, the proposed routing algorithm shows considerable reduction in packet latency for transpose 1, transpose 2, bit reversal and random synthetic traffic patterns.