An all-digital ΔΣ envelope modulator for EER-based transmitters based on CMOS standard cell design

Abstract

This paper presents an all-digital 4-bit delta-sigma (ΔΣ) modulator for envelope elimination and restoration (EER)-based polar transmitters. A fast feedback approach is devised by combining the digital truncator with path gains to reduce the propagation delay of feedback loops in modulators. The CMOS standard cell-based design could hence be utilized to implement the proposed modulator at a sampling frequency of 182 MHz. The noise transfer function of the presented ΔΣ modulator has been optimized to obtain a maximally flat noise band to easily meet the EDGE spectrum mask. Experiment results show the presented ΔΣ modulator has the noise power beneath −60 dB below the full-scale EDGE signal within ±20 MHz of the carrier frequency. The measured adjacent channel power ratios and alternate channel power ratio of the proposed modulator also give a 6 dB margin to the EDGE specification at 400 kHz and 600 kHz offsets.