{"title":"Fully integrated 5.6–6.4 GHz power amplifier using transformer combining","authors":"D. Gruner, G. Boeck","doi":"10.1109/RME.2009.5201289","DOIUrl":null,"url":null,"abstract":"A fully integrated 5.6-6.4 GHz power amplifier is implemented in a 0.25 um SiGe-HBT technology using an onchip transformer combining structure. The novel combiner topology combines the output power of two push pull pairs and leads to a reduced transistor size compared to a conventional combiner while enhancing the efficiency and maintaining the maximum output power. Electromagnetic modeling of the whole chip layout has been carried out to optimize the performance of the presented circuit. At 6 GHz and a supply voltage of 1.2/1.8 V the single-stage power amplifier achieves a measured output power of 18/21 dBm at 1 dB power compression and 21/24 dBm in saturation region. The maximum power added efficiency is 24.7%. A small signal gain of 12 dB was observed at the center frequency of 6 GHz.","PeriodicalId":245992,"journal":{"name":"2009 Ph.D. Research in Microelectronics and Electronics","volume":"40 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2009-07-12","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"5","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2009 Ph.D. Research in Microelectronics and Electronics","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/RME.2009.5201289","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 5
Abstract
A fully integrated 5.6-6.4 GHz power amplifier is implemented in a 0.25 um SiGe-HBT technology using an onchip transformer combining structure. The novel combiner topology combines the output power of two push pull pairs and leads to a reduced transistor size compared to a conventional combiner while enhancing the efficiency and maintaining the maximum output power. Electromagnetic modeling of the whole chip layout has been carried out to optimize the performance of the presented circuit. At 6 GHz and a supply voltage of 1.2/1.8 V the single-stage power amplifier achieves a measured output power of 18/21 dBm at 1 dB power compression and 21/24 dBm in saturation region. The maximum power added efficiency is 24.7%. A small signal gain of 12 dB was observed at the center frequency of 6 GHz.
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