Combine dynamic time-slice scaling with DVFS for coordinating thermal and fairness on CPU

Abstract

As power density increases with high technology, the high temperature has threatened the system performance, reliability and even system safety. Develop a thermal management for reducing temperature, but without disturbing fairness, is becoming more and more important. Therefore, in this paper, we propose a DTS-DVFS management which combines Dynamic Time-Slice Scaling (DTS) with Dynamic Voltage and Frequency Scaling (DVFS). Through fine-grained thermal characterization based on task behavior, dynamically determine both Time-slice Scaling factor (TSF) and Voltage and Frequency Scaling factor (VSF) for each task on real-time which not only reduces temperature but also retains fairness. Besides scaling both time-slice and voltage and frequency for each task according to TSF and VSF respectively, combining alternative scheduling scheme based on boosting thermal model which predicts the temperature of the chip. Through our experiments in real machine, results demonstrate our proposed policy can reduce the chip average and peak temperature maximums by 4.2°C and 2.9°C with negligible fairness loss.