Design and Implementation of ALU Using Ring Counters

J.L.V Ramana Kumari, Y. Varshitha, Chebrolu Gopi, M. Rakesh
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Abstract

An arithmetic logic unit in computing is a combinational digital circuit that operates on integer, binary integers mathematically and bitwise. The aim of this paper is to design an ALU using 8-bit Programmable Ring counter, that is a combination of straight and twisted ring counters. It accepts two 4-bit binary numbers, perform ALU operations and results the output. And finally, compare the performance of ALU between Ring counters in terms of various aspects. An ALU performs several arithmetic and logical operations on two 4-bit values, that includes addition, subtraction, logical AND, OR, XNOR, LEFT SHIFT AND RIGHT SHIFT. Based on the values of the select lines received from the Ring Counters, multiple ALU outputs are possible. The processor’s ALU is implemented using Xilinx software, namely the integrated simulator in Xilinx ISE Design Suite 14.2.
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基于环形计数器的ALU设计与实现
计算中的算术逻辑单元是一种组合数字电路,它在数学上和位上对整数、二进制整数进行运算。本文的目的是设计一个使用8位可编程环计数器的ALU,即直环计数器和扭环计数器的组合。它接受两个4位二进制数,执行ALU操作并输出结果。最后,从各个方面比较了环计数器之间ALU的性能。ALU对两个4位值执行一些算术和逻辑运算,包括加、减、逻辑与、或、异或、左移和右移。根据从环形计数器接收到的选择线的值,可以有多个ALU输出。处理器的ALU是使用Xilinx软件实现的,即Xilinx ISE Design Suite 14.2中的集成模拟器。
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