{"title":"Design of inverse DCT unit and motion compensator for MPEG2 HDTV decoding","authors":"T. Onoye, Y. Morimoto, T. Masaki, I. Shirakawa","doi":"10.1109/APCCAS.1994.514621","DOIUrl":null,"url":null,"abstract":"An MPEG2 video decoder core is implemented, which consists of an inverse discrete cosine transform (IDCT) unit and a motion compensator. By means of butterfly computation, multi-bit extension of distributed arithmetic, and improvement of critical paths, the IDCT unit achieves a high throughput, and the motion compensator calculates half-pel image dynamically so as to cover several types of picture prediction modes employed by MPEG2. The decoder core occupies 27 mm/sup 2/ in a 0.6-/spl mu/m triple-metal CMOS technology, processes a macroblock (16/spl times/16 pels) within 2.5 /spl mu/s, and therefore is capable of decoding HDTV (1920/spl times/1152 pels) resolution images in real time.","PeriodicalId":231368,"journal":{"name":"Proceedings of APCCAS'94 - 1994 Asia Pacific Conference on Circuits and Systems","volume":"137 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1994-12-05","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"Proceedings of APCCAS'94 - 1994 Asia Pacific Conference on Circuits and Systems","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/APCCAS.1994.514621","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 1
Abstract
An MPEG2 video decoder core is implemented, which consists of an inverse discrete cosine transform (IDCT) unit and a motion compensator. By means of butterfly computation, multi-bit extension of distributed arithmetic, and improvement of critical paths, the IDCT unit achieves a high throughput, and the motion compensator calculates half-pel image dynamically so as to cover several types of picture prediction modes employed by MPEG2. The decoder core occupies 27 mm/sup 2/ in a 0.6-/spl mu/m triple-metal CMOS technology, processes a macroblock (16/spl times/16 pels) within 2.5 /spl mu/s, and therefore is capable of decoding HDTV (1920/spl times/1152 pels) resolution images in real time.
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