Bit-fixing codes for multi-level cells

Abstract

Codes that correct limited-magnitude errors for multi-level cell nonvolatile memories, such as flash memories and phase-change memories, have received interest in recent years. This work proposes a new coding scheme that generalizes a known result [2] and works for arbitrary error distributions. In this scheme, every cell's discrete level ℓ is mapped to its binary representation (b_m-1, ..., b₁,b₀), where the m bits belong to m different error-correcting codes. The error ε in a cell is mapped to its binary representation (e_m-1, ..., e₁, e₀), and the codes are designed such that every error bit ei only affects the codeword containing the data bit b_i. The m codewords are decoded sequentially to correct the bit-errors e₀,e₁, ..., e_m-1 in order. The scheme can be generalized to many more numeral systems for cell levels and errors, optimized cell-level labelings, and any number of cell levels. It can be applied not only to storage but also to amplitude-modulation communication systems.