Compiling and Optimizing Real-world Programs for STRAIGHT ISA

Toru Koizumi, Shu Sugita, Ryota Shioya, J. Kadomoto, H. Irie, S. Sakai
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引用次数: 3

Abstract

The renaming unit of a superscalar processor is a very expensive module. It consumes large amounts of power and limits the front-end bandwidth. To overcome this problem, an instruction set architecture called STRAIGHT has been proposed. Owing to its unique manner of referencing operands, STRAIGHT does not cause false dependencies and allows out-of-order execution without register renaming. However, the compiler optimization techniques for STRAIGHT are still immature, and we found that the naive code generators currently available can generate inefficient code with additional instructions. In this paper, we propose two novel compiler optimization techniques and a novel calling convention for STRAIGHT to reduce the number of instructions. We compiled real-world programs with a compiler that implemented these techniques and measured their performance through simulation. The evaluation results show that the proposed methods reduced the number of executed instructions by 15% and improved the performance by 17%.
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编译和优化现实世界的程序为直ISA
超标量处理器的重命名单元是一个非常昂贵的模块。它消耗大量的功率,并限制前端带宽。为了克服这个问题,提出了一种称为STRAIGHT的指令集体系结构。由于其引用操作数的独特方式,STRAIGHT不会导致错误的依赖关系,并且允许在不重命名寄存器的情况下乱序执行。然而,STRAIGHT的编译器优化技术仍然不成熟,我们发现目前可用的幼稚代码生成器可以生成带有额外指令的低效代码。在本文中,我们提出了两种新的编译器优化技术和一种新的调用约定来减少STRAIGHT的指令数量。我们用实现这些技术的编译器编译了真实世界的程序,并通过模拟测量了它们的性能。评估结果表明,所提出的方法减少了15%的执行指令数,性能提高了17%。
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