A 1V low power sigma-delta modulator based on floating gate MOS transistors

Min Xu, E. Rodríguez-Villegas
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引用次数: 2

Abstract

This paper presents a novel low voltage and low power continuous time sigma-delta modulator based on the floating gate MOS (FGMOS) transistors. The performance of the two main building blocks in the modulator, the continuous time integrator and the comparator, are achieved by exploiting the benefits of the FGMOS devices. It is proven that using FGMOS devices improves the circuit linearity and hence increases the dynamic range. The modulator, designed in AMS 0.35 mum technology, works at a supply voltage of 1 V, exhibits a dynamic range (DR) of 67 dB, signal-to-noise- ratio (SNR) of 63 dB and signal-to-noise-and-distortion-ratio (SNDR) of 60 dB of 2 kHz Bandwidth (BW), with a power consumption of 5 muW.
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一种基于浮栅MOS晶体管的1V低功耗sigma-delta调制器
提出了一种基于浮栅MOS (FGMOS)晶体管的新型低电压、低功耗连续时间σ - δ调制器。调制器的两个主要组成部分,连续时间积分器和比较器的性能是通过利用FGMOS器件的优点来实现的。实验证明,使用FGMOS器件改善了电路的线性度,从而增加了动态范围。该调制器采用AMS 0.35 mum技术设计,工作电压为1 V,在2 kHz带宽(BW)下,动态范围(DR)为67 dB,信噪比(SNR)为63 dB,信噪比(SNDR)为60 dB,功耗为5 muW。
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