A P1500-compliant wrapper and TAM controller co-design scheme

Abstract

IEEE P1500 is a standard under development which intends to improve ease of test reuse and test integration with respect to the core-based SoCs. This paper proposes a P1500-compliant wrapper and TAM controller design scheme. Area overhead and power consumption are taken into account in our scheme. Some experiment results based on a sample SoC are reported, showing the effectiveness of the proposed approach in terms of area overhead