On the impact of timing mismatch and memory length on digital predistortion systems

Abstract

Nonlinear power amplifiers (PAs) are commonly linearized by means of digital predistortion (DPD). To identify the predistorter, the input and output signals of the PA are compared. We analyze the impact of a delay mismatch between PA input and output signal on DPD system performance. Using various simulations and measurements, we examine the relation between the memory length of the DPD system and the delay of the PA. We will show that - up to a certain point - delay overestimation can be compensated for by the memory of the predistorter without performance degradation.