Synthesis method for design of power distribution network in high-speed digital systems

Abstract

In this letter, a noble methodology for design of the power distribution networks is presented. The proposed method is based on the PDN(power distribution network) synthesis with the path-based equivalent circuit (PBEC) model. From this approach, on-chip decoupling capacitance and effective inductance of the package as well as the amount, number and location of off-chip decoupling capacitors can directly be determined. The result of the proposed method was verified through comparison with that of PEEC (Partial Elements Equivalent Circuit).