Lumos+: Rapid, pre-RTL design space exploration on accelerator-rich heterogeneous architectures with reconfigurable logic

Liang Wang, K. Skadron
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引用次数: 3

Abstract

We propose Lumos+, an analytical framework for power and performance modeling of accelerator-rich heterogeneous architectures. As accelerators proliferate, the search space becomes too expensive for brute-force search. We describe a novel and highly accurate genetic search algorithm. We then use Lumos+ to explore the tradeoffs between using fixed-function accelerators and reconfigurable logic blocks, while accounting for diverse workload characteristics, hardware overheads, and system constraints, and show that reconfigurable logic can improve power and performance while improving overall system flexibility and the ability to adapt to diverse and changing workloads.
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Lumos+:快速,pre-RTL设计空间探索加速器丰富的异构架构与可重构逻辑
我们提出了Lumos+,一个分析框架,用于丰富的加速器异构架构的功率和性能建模。随着加速器的激增,搜索空间对于暴力搜索来说变得过于昂贵。我们描述了一个新的和高度精确的遗传搜索算法。然后,我们使用Lumos+探索使用固定功能加速器和可重构逻辑块之间的权衡,同时考虑不同的工作负载特征、硬件开销和系统约束,并表明可重构逻辑可以提高功耗和性能,同时提高整体系统灵活性和适应不同和不断变化的工作负载的能力。
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