K. Nah, T. Ahn, Seung-Beom Baik, Jin-Sub Choi, W. Choo, Dong-Jin Keum, I. Sohn, D. Jung
{"title":"A 48-pin \"minichip\" implementation of baseband analog processor for the CDMA mobile phones","authors":"K. Nah, T. Ahn, Seung-Beom Baik, Jin-Sub Choi, W. Choo, Dong-Jin Keum, I. Sohn, D. Jung","doi":"10.1109/APASIC.1999.824125","DOIUrl":null,"url":null,"abstract":"A 48-pin \"minichip\" version of the baseband to IF band transceiver chip for CDMA mobile phones, commonly known as the BBA chip, is introduced. It achieves about a thirty three percent reduction in the total pin count relative to the well established 80-pin package version. The paper also presents countermeasures taken against the worsened noise environment brought on by the increased sharing of the power and ground pins among the internal blocks. The minichip is fabricated in a 0.8-/spl mu/m 8-GHz BiCMOS technology and consumes 36 mA from a 3.3 V supply. Its size is 4450/spl times/4450 /spl mu/m/sup 2/. The chip has found application in what are known as watch-phones.","PeriodicalId":346808,"journal":{"name":"AP-ASIC'99. First IEEE Asia Pacific Conference on ASICs (Cat. No.99EX360)","volume":"49 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1999-08-23","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"2","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"AP-ASIC'99. First IEEE Asia Pacific Conference on ASICs (Cat. No.99EX360)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/APASIC.1999.824125","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 2
Abstract
A 48-pin "minichip" version of the baseband to IF band transceiver chip for CDMA mobile phones, commonly known as the BBA chip, is introduced. It achieves about a thirty three percent reduction in the total pin count relative to the well established 80-pin package version. The paper also presents countermeasures taken against the worsened noise environment brought on by the increased sharing of the power and ground pins among the internal blocks. The minichip is fabricated in a 0.8-/spl mu/m 8-GHz BiCMOS technology and consumes 36 mA from a 3.3 V supply. Its size is 4450/spl times/4450 /spl mu/m/sup 2/. The chip has found application in what are known as watch-phones.
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