A Source Emulation Method Based on 2-Tone Sinusoidal Jitter Modeling for High-Speed Serial-Link Compliance Testing

Abstract

In this letter, we propose a compliance test emulation method for high-speed serial links based on source and channel modeling. The source and channel are characterized by using the proposed 2-tone sinusoidal jitter (SJ) modeling and impulse responses, respectively. The proposed 2-tone model represents periodic jitter components which include phase noise and power supply-induced jitter (PSIJ). The proposed method enables a sink device-only compliance test by effectively emulating the source devices and channels, which reduces the test time and cost. The effectiveness of the proposed link emulation method is demonstrated by comparing its performance with that of conventional compliance tests.