A 100 × 80 Flash LiDAR Sensor With In-Pixel Zoom-Histogramming TDC and Self-Referenced Single-Slope ADC Based on Analog Counters

IF 5.6 1区 工程技术 Q1 ENGINEERING, ELECTRICAL & ELECTRONIC IEEE Journal of Solid-state Circuits Pub Date : 2024-10-16 DOI:10.1109/JSSC.2024.3474831
Su-Hyun Han;Seonghyeok Park;Bumjun Kim;Jung-Hoon Chun;Jaehyuk Choi;Seong-Jin Kim
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Abstract

This article presents a CMOS flash light detection and ranging (LiDAR) sensor featuring an in-pixel histogramming time-to-digital converter (hTDC) with a minimal footprint of $1110~{\mu }$ m2 facilitated by analog counters. The proposed hTDC utilizes a two-step approach to combine a coarse step using the successive approximation (SA) method and a fine step based on phase-delay calculation akin to the indirect ToF (iToF) technique, achieving a resolution of 200 ps. Compared to the conventional digital counters, the proposed analog counter replaced with histogram memories attains a substantial power reduction of 3300-fold under 80-klx illumination. The analog counter consumes only 8 nW for in-pixel histogramming operation and occupies 6.5% of the hTDC area. Furthermore, an in-pixel self-referenced single-slope analog-to-digital converter (SS-ADC) is devised to mitigate the vulnerability of the analog counter to PVT variations. This SS-ADC can suppress the pixel-to-pixel gain variation, suppressing the non-uniformities of counters. The timing generator (TG) of each pixel, which originally generates the time gate window, has been reconfigured to serve as a 10-bit counter for A/D conversion. The prototype LiDAR sensor with a $100{\times }80$ pixel array was fabricated in a 0.11- $\mu $ m CMOS image sensor (CIS) process. The coarse TDC has a resolution of 75 cm and can achieve a detection range of up to 24 m with less than one LSB error over all measurements. Under indoor conditions, the coarse and fine TDC measures the depth accuracy and precision of 4.8 and 2.8 cm, respectively, within the 6–7.5-m range.
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基于模拟计数器的 100 美元(times$ 80)闪存激光雷达传感器,具有像素内缩放-制图 TDC 和自参考单斜率 ADC
本文介绍了一种CMOS闪光检测和测距(LiDAR)传感器,该传感器具有像素内直方图时间-数字转换器(hTDC),其最小占地面积为$1110~{\mu}$ m2,由模拟计数器促进。所提出的hTDC采用两步方法,结合使用逐次逼近(SA)方法的粗步和基于类似于间接ToF (iToF)技术的基于相位延迟计算的细步,实现了200 ps的分辨率。与传统数字计数器相比,所提出的用直方图存储器取代的模拟计数器在80 klx照明下的功耗降低了3300倍。模拟计数器的像素级直方图运算仅消耗8nw,占用hTDC面积的6.5%。此外,设计了一个像素内自参考单斜率模数转换器(SS-ADC),以减轻模拟计数器对PVT变化的脆弱性。这种SS-ADC可以抑制像素间的增益变化,抑制计数器的不均匀性。每个像素的时序发生器(TG),最初产生时间门窗口,已被重新配置为作为a /D转换的10位计数器。采用0.11- $\mu $ m CMOS图像传感器(CIS)工艺制作了具有$100{\times}80$像素阵列的原型LiDAR传感器。粗TDC具有75厘米的分辨率,可以实现高达24米的检测范围,在所有测量中误差小于一个LSB。在室内条件下,粗TDC和细TDC在6 - 7.5 m范围内测得深度精度分别为4.8 cm和2.8 cm。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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来源期刊
IEEE Journal of Solid-state Circuits
IEEE Journal of Solid-state Circuits 工程技术-工程:电子与电气
CiteScore
11.00
自引率
20.40%
发文量
351
审稿时长
3-6 weeks
期刊介绍: The IEEE Journal of Solid-State Circuits publishes papers each month in the broad area of solid-state circuits with particular emphasis on transistor-level design of integrated circuits. It also provides coverage of topics such as circuits modeling, technology, systems design, layout, and testing that relate directly to IC design. Integrated circuits and VLSI are of principal interest; material related to discrete circuit design is seldom published. Experimental verification is strongly encouraged.
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