Industrial Temporal Logic Specifications for Falsification of Cyber-Physical Systems

The Archivist Pub Date : 2020-01-01 DOI:10.29007/r74f
J. Eddeland, Alexandre Donzé, S. Miremadi, K. Åkesson
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引用次数: 5

Abstract

In this benchmark proposal, we present a set of large specifications stated in Signal Temporal Logic (STL) intended for use in falsification of Cyber-Physical Systems. The main purpose of the benchmark is for tools that monitor STL specifications to be able to test their performance on complex specifications that have structure similar to industrial specifications. The benchmark itself is a Git repository which will therefore be updated over time, and new specifications can be added. At the time of submission, the repository contains a total of seven Simulink requirement models, resulting in 17 generated STL specifications.
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用于信息物理系统伪造的工业时序逻辑规范
在这个基准提案中,我们提出了一组在信号时序逻辑(STL)中规定的大型规范,旨在用于伪造网络物理系统。基准测试的主要目的是让监视STL规范的工具能够在结构类似于工业规范的复杂规范上测试它们的性能。基准本身是一个Git存储库,因此会随着时间的推移而更新,并且可以添加新的规范。在提交时,存储库总共包含7个Simulink需求模型,从而产生17个生成的STL规范。
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