采用RNS算法设计快速加法器和快速乘法器FIR滤波器

Balaji M, P. N., G. P., Saif Ali Shaik, S. P, Sai Geetesh R
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引用次数: 0

摘要

这项工作背后的主要驱动力是提供基于高效和超高性能FIR滤波器的4分、8分、16分、32分和64分RNS(剩余数系统)的设计和实现。RNS数学是对快速数学的速度限制进行理论研究的宝贵工具。一些建议的解决方案还包括一些加法运算;然而,使用传统的加法器将减慢操作速度并增加逻辑门的数量。因此,为了解决上述问题,Kogge-Stone加法器和Brent Kung加法器被用于减少延迟和面积,并提高整体性能。首先,使用RNS方法创建乘数。其中吠陀乘法器的功耗也被最小化,而延迟从70%缩短到90%。为了评估结果,我们还使用了一个简单的加法器和一个简单的乘法器。使用Quartus 9.0仿真工具,这些方法的组合产生了一个全新的结构,具有极高的速度和很小的FIR滤波器实现区域。
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Design of FIR filter with Fast Adders and Fast Multipliers using RNS Algorithm
The primary driving force behind the creation of this work was to provide the design and implementation of a 4-tap, 8-tap, 16-tap, 32-tap, and 64-tap RNS (Residue Number System) based on efficient and excessive-overall performance FIR filter. RNS mathematics is a prized tool for theoretical investigation of the speed limitations of rapid mathematics. Some suggested solutions also include a few addition operations; however, using conventional adders will slow down operation and add to the amount of logic gates. So, to address the aforementioned concerns, Kogge-Stone Adder and Brent Kung Adder are being used to reduce delay and area and enhance performance as a whole. First, the multiplier is created using the RNS methodology. In which the Vedic multiplier's power dissipation is also minimized while the latency is shortened from 70% to 90%. In order to assess the findings, we are also using a simple adder and a simple multiplier. Using the Quartus 9.0 Simulation Tool, the combination of those methods results in a completely new structure with an excessively high speed and a small implementation area for the FIR filter.
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