{"title":"容错多处理器工作站的体系结构","authors":"J. Banâtre, M. Banâtre, Gilles Muller","doi":"10.1109/WWOS.1989.109262","DOIUrl":null,"url":null,"abstract":"A fault-tolerant multiprocessor architecture that is based on standard processors associated with stable storage boards is presented. The hardware architecture of the stable storage board and its software interface are briefly described. The hardware organization of the fault-tolerant multiprocessor is detailed, and some functionalities of a secure kernel are examined. The current status of the project is indicated.<<ETX>>","PeriodicalId":342782,"journal":{"name":"Proceedings of the Second Workshop on Workstation Operating Systems","volume":"238 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1989-09-27","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"6","resultStr":"{\"title\":\"Architecture of fault-tolerant multiprocessor workstations\",\"authors\":\"J. Banâtre, M. Banâtre, Gilles Muller\",\"doi\":\"10.1109/WWOS.1989.109262\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"A fault-tolerant multiprocessor architecture that is based on standard processors associated with stable storage boards is presented. The hardware architecture of the stable storage board and its software interface are briefly described. The hardware organization of the fault-tolerant multiprocessor is detailed, and some functionalities of a secure kernel are examined. The current status of the project is indicated.<<ETX>>\",\"PeriodicalId\":342782,\"journal\":{\"name\":\"Proceedings of the Second Workshop on Workstation Operating Systems\",\"volume\":\"238 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"1989-09-27\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"6\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"Proceedings of the Second Workshop on Workstation Operating Systems\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/WWOS.1989.109262\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"Proceedings of the Second Workshop on Workstation Operating Systems","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/WWOS.1989.109262","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Architecture of fault-tolerant multiprocessor workstations
A fault-tolerant multiprocessor architecture that is based on standard processors associated with stable storage boards is presented. The hardware architecture of the stable storage board and its software interface are briefly described. The hardware organization of the fault-tolerant multiprocessor is detailed, and some functionalities of a secure kernel are examined. The current status of the project is indicated.<>
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