David Chen, G. Lin, Tien Hua Lee, Ryan Lee, Y. C. Liu, Meng Fan Wang, Yi Ching Cheng, D. Y. Wu
{"title":"FinFET技术布局依赖效应的紧凑建模解决方案","authors":"David Chen, G. Lin, Tien Hua Lee, Ryan Lee, Y. C. Liu, Meng Fan Wang, Yi Ching Cheng, D. Y. Wu","doi":"10.1109/ICMTS.2015.7106119","DOIUrl":null,"url":null,"abstract":"We successfully developed and verified a complete compact model solution for layout dependent effect (LDE) of FinFET technology. LDE has significant impact on the device performances mainly due to the application of stressors and aggressive device scaling. With LDE, performance degradation may be up to 10% or more. In this work, compact model solution for Length of Oxidation (LOD), Well Proximity Effect (WPE), Neighboring Diffusion Effect (NDE), Metal Boundary Effect (MBE), and Gate Line End Effect (GLE) were delivered. This solution was implemented successfully in BSIM-CMG for efficient circuit simulation.","PeriodicalId":177627,"journal":{"name":"Proceedings of the 2015 International Conference on Microelectronic Test Structures","volume":"105 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2015-03-23","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"11","resultStr":"{\"title\":\"Compact modeling solution of layout dependent effect for FinFET technology\",\"authors\":\"David Chen, G. Lin, Tien Hua Lee, Ryan Lee, Y. C. Liu, Meng Fan Wang, Yi Ching Cheng, D. Y. Wu\",\"doi\":\"10.1109/ICMTS.2015.7106119\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"We successfully developed and verified a complete compact model solution for layout dependent effect (LDE) of FinFET technology. LDE has significant impact on the device performances mainly due to the application of stressors and aggressive device scaling. With LDE, performance degradation may be up to 10% or more. In this work, compact model solution for Length of Oxidation (LOD), Well Proximity Effect (WPE), Neighboring Diffusion Effect (NDE), Metal Boundary Effect (MBE), and Gate Line End Effect (GLE) were delivered. This solution was implemented successfully in BSIM-CMG for efficient circuit simulation.\",\"PeriodicalId\":177627,\"journal\":{\"name\":\"Proceedings of the 2015 International Conference on Microelectronic Test Structures\",\"volume\":\"105 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2015-03-23\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"11\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"Proceedings of the 2015 International Conference on Microelectronic Test Structures\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ICMTS.2015.7106119\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"Proceedings of the 2015 International Conference on Microelectronic Test Structures","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ICMTS.2015.7106119","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Compact modeling solution of layout dependent effect for FinFET technology
We successfully developed and verified a complete compact model solution for layout dependent effect (LDE) of FinFET technology. LDE has significant impact on the device performances mainly due to the application of stressors and aggressive device scaling. With LDE, performance degradation may be up to 10% or more. In this work, compact model solution for Length of Oxidation (LOD), Well Proximity Effect (WPE), Neighboring Diffusion Effect (NDE), Metal Boundary Effect (MBE), and Gate Line End Effect (GLE) were delivered. This solution was implemented successfully in BSIM-CMG for efficient circuit simulation.