使用嵌入式处理器压缩包含未知数的输出响应

Kamran Saleem, Sreenivaas S. Muthyala, N. Touba
{"title":"使用嵌入式处理器压缩包含未知数的输出响应","authors":"Kamran Saleem, Sreenivaas S. Muthyala, N. Touba","doi":"10.1109/DFT.2015.7315154","DOIUrl":null,"url":null,"abstract":"In system-on-chip (SOC) designs, embedded processors are frequently present as part of the functional design and can be used to help test the chip or system by providing a software-based test. Previous work has looked at compacting output responses in software by performing signature analysis using either arithmetic operations or by implementing a multi-input signature register (MISR) in software. However, these approaches cannot be used when the output response contains unknown (X) values. While it is possible to precisely mask all X's present in the output response in software, a straightforward approach would require a very large amount of mask data to specify which bits to mask. This paper proposes an efficient method for compacting output responses with X's in software using the concept of canceling X's from signatures as proposed in [Touba 07], Whereas the efficiency of the hardware implementation in [Touba 07] is constrained by needing to minimize the hardware overhead, in software these constraints are not present. Thus, a novel and more efficient implementation is proposed here. Moreover, the efficiency is further improved by incorporating a low cost partial X-masking step in software as well. Results indicate that output responses with significant X densities can be very efficiently compacted using the proposed software-based scheme.","PeriodicalId":383972,"journal":{"name":"2015 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems (DFTS)","volume":"28 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2015-11-09","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"Compacting output responses containing unknowns using an embedded processor\",\"authors\":\"Kamran Saleem, Sreenivaas S. Muthyala, N. Touba\",\"doi\":\"10.1109/DFT.2015.7315154\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"In system-on-chip (SOC) designs, embedded processors are frequently present as part of the functional design and can be used to help test the chip or system by providing a software-based test. Previous work has looked at compacting output responses in software by performing signature analysis using either arithmetic operations or by implementing a multi-input signature register (MISR) in software. However, these approaches cannot be used when the output response contains unknown (X) values. While it is possible to precisely mask all X's present in the output response in software, a straightforward approach would require a very large amount of mask data to specify which bits to mask. This paper proposes an efficient method for compacting output responses with X's in software using the concept of canceling X's from signatures as proposed in [Touba 07], Whereas the efficiency of the hardware implementation in [Touba 07] is constrained by needing to minimize the hardware overhead, in software these constraints are not present. Thus, a novel and more efficient implementation is proposed here. Moreover, the efficiency is further improved by incorporating a low cost partial X-masking step in software as well. Results indicate that output responses with significant X densities can be very efficiently compacted using the proposed software-based scheme.\",\"PeriodicalId\":383972,\"journal\":{\"name\":\"2015 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems (DFTS)\",\"volume\":\"28 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2015-11-09\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2015 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems (DFTS)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/DFT.2015.7315154\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2015 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems (DFTS)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/DFT.2015.7315154","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 0

摘要

在片上系统(SOC)设计中,嵌入式处理器经常作为功能设计的一部分出现,并且可以通过提供基于软件的测试来帮助测试芯片或系统。以前的工作着眼于压缩软件中的输出响应,通过使用算术运算或在软件中实现多输入签名寄存器(MISR)来执行签名分析。但是,当输出响应包含未知(X)值时,不能使用这些方法。虽然在软件中可以精确地屏蔽输出响应中的所有X,但一种直接的方法将需要非常大量的屏蔽数据来指定要屏蔽的位。本文提出了一种在软件中使用[Touba 07]中提出的从签名中取消X的概念来压缩带有X的输出响应的有效方法,而[Touba 07]中硬件实现的效率受到需要最小化硬件开销的约束,而在软件中这些约束不存在。因此,本文提出了一种新的、更有效的实现方法。此外,通过在软件中加入低成本的部分x屏蔽步骤,进一步提高了效率。结果表明,使用所提出的基于软件的方案可以非常有效地压缩具有显著X密度的输出响应。
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Compacting output responses containing unknowns using an embedded processor
In system-on-chip (SOC) designs, embedded processors are frequently present as part of the functional design and can be used to help test the chip or system by providing a software-based test. Previous work has looked at compacting output responses in software by performing signature analysis using either arithmetic operations or by implementing a multi-input signature register (MISR) in software. However, these approaches cannot be used when the output response contains unknown (X) values. While it is possible to precisely mask all X's present in the output response in software, a straightforward approach would require a very large amount of mask data to specify which bits to mask. This paper proposes an efficient method for compacting output responses with X's in software using the concept of canceling X's from signatures as proposed in [Touba 07], Whereas the efficiency of the hardware implementation in [Touba 07] is constrained by needing to minimize the hardware overhead, in software these constraints are not present. Thus, a novel and more efficient implementation is proposed here. Moreover, the efficiency is further improved by incorporating a low cost partial X-masking step in software as well. Results indicate that output responses with significant X densities can be very efficiently compacted using the proposed software-based scheme.
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