E. Charbon, F. Sebastiano, Andrei Vladimirescu, H. Homulle, Stefan Visser, Lin Song, R. M. Incandela
{"title":"用于量子计算的低温cmos","authors":"E. Charbon, F. Sebastiano, Andrei Vladimirescu, H. Homulle, Stefan Visser, Lin Song, R. M. Incandela","doi":"10.1109/IEDM.2016.7838410","DOIUrl":null,"url":null,"abstract":"Cryogenic CMOS, or cryo-CMOS circuits and systems, are emerging in VLSI design for many applications, in primis quantum computing. Fault-tolerant quantum bits (qubits) in surface code configurations, one of the most accepted implementations in quantum computing, operate in deep sub-Kelvin regime and require scalable classical control circuits. In this paper we advocate the need for a new generation of deep-submicron CMOS circuits operating at deep-cryogenic temperatures to achieve the performance required in a fault-tolerant qubit system. We outline the challenges and limitations of operating CMOS in near-zero Kelvin regimes and we propose solutions. The paper concludes with several examples showing the suitability of integrating fault-tolerant.qubits with CMOS.","PeriodicalId":186544,"journal":{"name":"2016 IEEE International Electron Devices Meeting (IEDM)","volume":"155 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2016-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"131","resultStr":"{\"title\":\"Cryo-CMOS for quantum computing\",\"authors\":\"E. Charbon, F. Sebastiano, Andrei Vladimirescu, H. Homulle, Stefan Visser, Lin Song, R. M. Incandela\",\"doi\":\"10.1109/IEDM.2016.7838410\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"Cryogenic CMOS, or cryo-CMOS circuits and systems, are emerging in VLSI design for many applications, in primis quantum computing. Fault-tolerant quantum bits (qubits) in surface code configurations, one of the most accepted implementations in quantum computing, operate in deep sub-Kelvin regime and require scalable classical control circuits. In this paper we advocate the need for a new generation of deep-submicron CMOS circuits operating at deep-cryogenic temperatures to achieve the performance required in a fault-tolerant qubit system. We outline the challenges and limitations of operating CMOS in near-zero Kelvin regimes and we propose solutions. The paper concludes with several examples showing the suitability of integrating fault-tolerant.qubits with CMOS.\",\"PeriodicalId\":186544,\"journal\":{\"name\":\"2016 IEEE International Electron Devices Meeting (IEDM)\",\"volume\":\"155 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2016-12-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"131\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2016 IEEE International Electron Devices Meeting (IEDM)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/IEDM.2016.7838410\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2016 IEEE International Electron Devices Meeting (IEDM)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/IEDM.2016.7838410","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Cryogenic CMOS, or cryo-CMOS circuits and systems, are emerging in VLSI design for many applications, in primis quantum computing. Fault-tolerant quantum bits (qubits) in surface code configurations, one of the most accepted implementations in quantum computing, operate in deep sub-Kelvin regime and require scalable classical control circuits. In this paper we advocate the need for a new generation of deep-submicron CMOS circuits operating at deep-cryogenic temperatures to achieve the performance required in a fault-tolerant qubit system. We outline the challenges and limitations of operating CMOS in near-zero Kelvin regimes and we propose solutions. The paper concludes with several examples showing the suitability of integrating fault-tolerant.qubits with CMOS.