{"title":"一个1.2V单电源和低功耗，CMOS四象限模拟乘法器","authors":"A. Ebrahimi, H. M. Naimi","doi":"10.1109/SM2ACD.2010.5672334","DOIUrl":null,"url":null,"abstract":"In this paper, a new low voltage topology for analog multiplier is presented. The circuit can be used with single low-power supply. The complete circuit has only twelve transistors; therefore, it satisfies the need for compact sub-circuit in analog VLSI systems. The mathematical discussion on the power consumption, total harmonic distortion and other features of the circuit and also simulation results in 0.18µm CMOS technology are presented. The results show 113µW power consumption with 1.2V single supply, 1.1% total harmonic distortion (THD) and 1GHz band-width.","PeriodicalId":442381,"journal":{"name":"2010 XIth International Workshop on Symbolic and Numerical Methods, Modeling and Applications to Circuit Design (SM2ACD)","volume":"58 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2010-12-17","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"8","resultStr":"{\"title\":\"A 1.2V single supply and low power, CMOS four-quadrant analog multiplier\",\"authors\":\"A. Ebrahimi, H. M. Naimi\",\"doi\":\"10.1109/SM2ACD.2010.5672334\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"In this paper, a new low voltage topology for analog multiplier is presented. The circuit can be used with single low-power supply. The complete circuit has only twelve transistors; therefore, it satisfies the need for compact sub-circuit in analog VLSI systems. The mathematical discussion on the power consumption, total harmonic distortion and other features of the circuit and also simulation results in 0.18µm CMOS technology are presented. The results show 113µW power consumption with 1.2V single supply, 1.1% total harmonic distortion (THD) and 1GHz band-width.\",\"PeriodicalId\":442381,\"journal\":{\"name\":\"2010 XIth International Workshop on Symbolic and Numerical Methods, Modeling and Applications to Circuit Design (SM2ACD)\",\"volume\":\"58 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2010-12-17\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"8\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2010 XIth International Workshop on Symbolic and Numerical Methods, Modeling and Applications to Circuit Design (SM2ACD)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/SM2ACD.2010.5672334\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2010 XIth International Workshop on Symbolic and Numerical Methods, Modeling and Applications to Circuit Design (SM2ACD)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/SM2ACD.2010.5672334","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
A 1.2V single supply and low power, CMOS four-quadrant analog multiplier
In this paper, a new low voltage topology for analog multiplier is presented. The circuit can be used with single low-power supply. The complete circuit has only twelve transistors; therefore, it satisfies the need for compact sub-circuit in analog VLSI systems. The mathematical discussion on the power consumption, total harmonic distortion and other features of the circuit and also simulation results in 0.18µm CMOS technology are presented. The results show 113µW power consumption with 1.2V single supply, 1.1% total harmonic distortion (THD) and 1GHz band-width.
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