A CMOS Low-Noise, Low-Dropout Regulator for Transceiver SOC Supply Management

Low-noise, low-dropout (LN-LDO) regulators are critical for supply regulation of deep-submicron analog baseband and RF system-on-chip designs. A low 1/f noise LDO regulator utilizing a chopper stabilized error amplifier is introduced. A secondary amplifier with supply ripple subtraction stage is used for PSR improvement. With the proposed techniques, less than 180 nV/radicHz output noise spectral density and 50 dB of PSR is measured at 10 kHz frequency. With chopping frequencies up to 1MHz, the regulator achieves 5 mV/25 mA load regulation at 100 muA quiescent current. The LN-LDO is designed and fabricated on a 0.25mum, digital CMOS process with five level metal occupying 0.54 mm2.