基于逆变器的20khz带宽、66dB动态范围的2mhz 42 μ w ΔΣ ADC

2006 IEEE Asian Solid-State Circuits Conference Pub Date : 2006-12-01 DOI:10.1109/ASSCC.2006.357852

C. Su, Po-Chen Lin, Hungwen Lu

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引用次数: 11

摘要

提出了一种基于逆变器的三阶σ - δ ADC。提出了级联码结构和自动归零机制，用于增益增强和偏移抵消。该ADC采用台积电2P6M 0.18 μm CMOS技术实现，核心面积为0.54 mm2。测试结果表明，在1 v电源、20 khz带宽、2 mhz采样率下，功耗为42 μW，动态范围为66.02 dB。

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An Inverter Based 2-MHz 42-μW ΔΣ ADC with 20-KHz Bandwidth and 66dB Dynamic Range

This paper presented an inverter based 3rd order sigma-delta ADC. Cascode structure and auto-zeroing mechanism are proposed for the gain enhancement and offset cancellation. The ADC has been implemented in TSMC 2P6M 0.18 μm CMOS technology with a core area of 0.54 mm2. The measurement results show that for the 1-V supply, 20-KHz bandwidth, and 2-MHz sampling rate, the power consumption is 42 μW and the dynamic range of 66.02 dB.

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2006 IEEE Asian Solid-State Circuits Conference

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