用于低功耗应用的采用亚单层ALD HfSiON封装的SiON介质的相控Ni-FUSI cmosfet的演示

Hongyu Yu, Shou-Zen Chang, A. Veloso, A. Lauwers, A. Delabie, J. Everaert, R. Singanamalla, C. Kerner, C. Vrancken, S. Brus, P. Absil, T. Hoffmann, S. Biesemans
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摘要

在这项工作中,通过在相位控制的Ni-FUSI CMOS器件的SiON主机电介质上采用亚单层HfSiON帽(通过ALD沉积),我们报告了1)器件(n- fet和p- fet) V可能由于费米能级钉住弛豫而有效调制;2)栅极漏电明显减少;3)介质可靠性特性(如TZBD、pfet NBTI、nfet PBTI)明显改善;4)栅极电容等效厚度(Tinv)和长沟道器件的高Eeff迁移率均得以保留。具有17ps延迟的高vt环形振荡器已经被证明,与使用纯硅电介质的器件相比,显示出大大降低的静态功率(~10倍)。本文提出,采用亚单层HfSiON封装的SiON电介质,结合相控Ni-FUSI技术,有望用于45纳米及更低功耗的CMOS应用。
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Demonstration of phase-controlled Ni-FUSI CMOSFETs employing SiON dielectrics capped with sub-monolayer ALD HfSiON for low power applications
In this work, by employing a sub-monolayer HfSiON cap (via ALD deposition) on the SiON host dielectrics in the phase-controlled Ni-FUSI CMOS devices, we report that 1) the devices (both n-FETs and p-FETs) V, is effectively modulated likely due to the Fermi-level pinning relaxation; 2) the gate leakage is significantly reduced; 3) the dielectrics reliability characteristics (such as TZBD, pFETs NBTI, and nFETs PBTI) are clearly improved; 4) both the gate capacitance equivalent thickness (Tinv) and the long channel device high Eeff mobility are preserved. High-Vt ring oscillator with a delay of 17ps has been demonstrated, showing a much-reduced static power (~10 times) as compared to the devices using the pure SiON dielectrics. It is proposed that the SiON dielectrics capped with sub-monolayer HfSiON, in combination with the phase-controlled Ni-FUSI technology, is promising for 45 nm and beyond low power CMOS applications.
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