FPGA原型设计利用行为综合改进视频处理算法和FHD电视SoC设计

16th Asia and South Pacific Design Automation Conference (ASP-DAC 2011) Pub Date : 2011-01-25 DOI:10.1109/ASPDAC.2011.5722291

Masaru Takahashi

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引用次数: 0

摘要

片上系统(SoC)可以实现全高清(FHD)视频处理，但算法改进的周期较长。我们提出了利用行为综合的新方法。因此，可以缩短算法改进和硬件实现的周转时间。

本文章由计算机程序翻译，如有差异，请以英文原文为准。

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FPGA prototyping using behavioral synthesis for improving video processing algorithm and FHD TV SoC design

The System on Chip (SoC) can include Full High Definition (FHD) video processing, however the turn around time of algorithm improvement have been long. We provide the new method utilizing the behavioral synthesis. Therefore, the turn around time of the algorithm improvement and hardware implementation can be shorten.

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16th Asia and South Pacific Design Automation Conference (ASP-DAC 2011)

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