Hybridization of NSGA-II with greedy re-assignment for variation tolerant logic mapping on nano-scale crossbar architectures

There exit high variations among nano-devices in nano-electronic systems, owing to the extremely small size and the bottom-up self-assembly nanofabrication process. Therefore, it is important to develop logical function mapping techniques with the consideration of variation tolerance. In this paper, the variation tolerant logical mapping (VTLM) problem is treated as a multi-objective optimization problem (MOP), a hybridization of Non-dominated Sorting Genetic Algorithm II (NSGA-II) with a problem-specific local search is presented to solve the problem. The experiment results show that with the assistance of the problem-specific local search, the presented algorithm is effective, and can find better solutions than that without the local search.