Dual boost high performances Power Factor Correction (PFC) control strategy implemented on a low cost FPGA device, using a custom sfloat24 developed math library

In this paper are described a PI controller and an Active Filtering control strategy, applied to a Dual Boost Power Factor Correction (PFC) implementation, on a low cost FPGA device, using a custom developed sfloat24 math library. The implemented control strategy consists in an optimized power sharing where the active filtering approach is used to increase the current quality and at the same time to reduce the switching losses. The simulation results show that the sfloat24 floating point, IEEE 754 compliant, digital PI controller and the active filtering approach outperform by high-speed response, better precision, minor error and high dynamic range. Both the simulation and experimental results show that the adopted control strategy for PFC achieves near unity power factor and a not negligible switching losses reduction.