{"title":"在两个不同的逻辑阵列中使用选择性预充电减少能量","authors":"Shaoyi Wang, C. Zukowski","doi":"10.1109/MWSCAS.2000.951592","DOIUrl":null,"url":null,"abstract":"Selective precharge is a low-power circuit technique that can significantly reduce the average energy use in large fan-in logic arrays. In this paper, we investigate application of this technique to two specific real examples; a content addressable memory (CAM) used in a routing table and a programmable logic array (PLA) used for table-lookup function evaluation. We show that significant energy savings is possible, and we discuss the impact of various array characteristics.","PeriodicalId":437349,"journal":{"name":"Proceedings of the 43rd IEEE Midwest Symposium on Circuits and Systems (Cat.No.CH37144)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2000-08-08","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"Energy reduction from using selective precharge in two different logic arrays\",\"authors\":\"Shaoyi Wang, C. Zukowski\",\"doi\":\"10.1109/MWSCAS.2000.951592\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"Selective precharge is a low-power circuit technique that can significantly reduce the average energy use in large fan-in logic arrays. In this paper, we investigate application of this technique to two specific real examples; a content addressable memory (CAM) used in a routing table and a programmable logic array (PLA) used for table-lookup function evaluation. We show that significant energy savings is possible, and we discuss the impact of various array characteristics.\",\"PeriodicalId\":437349,\"journal\":{\"name\":\"Proceedings of the 43rd IEEE Midwest Symposium on Circuits and Systems (Cat.No.CH37144)\",\"volume\":\"1 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2000-08-08\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"Proceedings of the 43rd IEEE Midwest Symposium on Circuits and Systems (Cat.No.CH37144)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/MWSCAS.2000.951592\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"Proceedings of the 43rd IEEE Midwest Symposium on Circuits and Systems (Cat.No.CH37144)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/MWSCAS.2000.951592","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Energy reduction from using selective precharge in two different logic arrays
Selective precharge is a low-power circuit technique that can significantly reduce the average energy use in large fan-in logic arrays. In this paper, we investigate application of this technique to two specific real examples; a content addressable memory (CAM) used in a routing table and a programmable logic array (PLA) used for table-lookup function evaluation. We show that significant energy savings is possible, and we discuss the impact of various array characteristics.
京公网安备 11010802042870号
京ICP备2023020795号-1
分享
求助内容：
应助结果提醒方式：
扫码关注我们
