一种通用接地阻抗模拟器/带电子调谐的接地阻抗缩放电路

Pranjal Gupta, M. Srivastava, D. Prasad, Ajay Roy, Manish Kumar Verma
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引用次数: 1

摘要

本文提出了一种新的电路结构,可以作为接地阻抗模拟器/接地阻抗缩放电路。所提出的配置可以模拟电子可调谐的接地电阻/电容/电感/FDNR,也可以作为接地阻抗倍增电路,可以通过电子可控的倍增因子放大/缩小任意接地阻抗的值。所提出的电路采用三个电压差跨导放大器和三个接地无源元件。使用接地的无源元件使这种实现适合于单片集成。该电路对无源元件的匹配没有任何要求。在非理想条件下,发现所提出的构型的行为是不偏离的。为了验证数学分析,在PSPICE TSMC 0.18μm仿真环境下对该结构进行了仿真。
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A Generalized Grounded Impedance Simulator/Grounded Impedance Scaling Circuit with Electronic Tuning
This research paper proposes a new circuit configuration which can act like a grounded impedance simulator/grounded impedance scaling circuit. The presented configuration can simulate electronically tunable grounded resistance/capacitance/inductance/FDNR and also work as a grounded impedance multiplier circuit, which can scale-up/scale-down the value of arbitrary grounded impedance with an electronically controllable multiplication factor. The proposed circuit employed three voltage difference trans-conductance amplifiers along with three grounded passive elements. The use of grounded passive elements makes this realization suitable for monolithic integration. The presented circuit does not have any requirement of matched passive elements. Under non ideal conditions the behavior of proposed configuration is found un-deviated. To verify the mathematical analysis, the presented configuration is simulated under PSPICE TSMC 0.18μm simulation environment.
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