使用优化的虚拟位插入的速率兼容LDPC码

Moritz Beermann, Tobias Breddermann, P. Vary
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引用次数: 12

摘要

低密度奇偶校验码(Low-Density Parity-Check, LDPC)自从被MacKay重新发现以来,受到了广泛的关注。它们属于当今已知的最强大的信道编码技术,具有广泛的应用范围。在无线通信系统中,希望能够调整所采用的信道编码方案的码率(速率匹配),以允许对不同的业务具有灵活的错误保护强度,并且能够适应无线传输信道的不同质量。目前许多采用LDPC码的系统,如WiMAX或WLAN,都为每个支持的码率指定了单独的码。相比之下,本文解决了仅使用一个母码和匹配(几乎)任意低于母码率的码率的问题,方法是在编码前将已知(虚拟)比特插入信息比特序列(也称为修剪或代码缩短)。我们提出了一种新的规则来确定(启发式)在LDPC码的信息位序列中虚拟位的优化位置。仿真结果表明,采用虚拟位插入的新方法可以提高帧错误率的性能,特别是在误差底区。
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Rate-compatible LDPC codes using optimized dummy bit insertion
Much attention has been paid to Low-Density Parity-Check (LDPC) codes since their rediscovery by MacKay. They belong to the most powerful channel coding techniques known today and have a broad range of applications. In wireless communication systems it is desirable to be able to adjust the code rate of the employed channel coding scheme (rate-matching) to allow for a flexible strength of error protection for different services and to be able to adapt to the varying quality of the wireless transmission channel. Many of the current systems that employ LDPC codes like, e.g., WiMAX or WLAN specify separate codes for each supported code rate. This paper, in contrast, addresses the problem of using only one mother code and matching (almost) arbitrary code rates that are lower than the mother code rate by inserting known (dummy) bits into the information bit sequence before encoding (also known as pruning or code shortening). We present a novel rule of determining (heuristically) optimized positions of dummy bits within the information bit sequence suitable for LDPC codes. Simulation results show that the frame error rate performance can be improved by the novel approach of dummy bit insertion especially in the error floor region.
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