Guilherme Migliato Marega, Zhenyu Wang, Yanfei Zhao, Hyun Goo Ji, Asmund Ottesen, Mukesh Tripathi, Aleksandra Radenovic, Andras Kis
{"title":"如何实现MoS2单层快闪存储器的大面积超快速运算?","authors":"Guilherme Migliato Marega, Zhenyu Wang, Yanfei Zhao, Hyun Goo Ji, Asmund Ottesen, Mukesh Tripathi, Aleksandra Radenovic, Andras Kis","doi":"10.1109/mnano.2023.3297118","DOIUrl":null,"url":null,"abstract":"Memory devices have returned to the spotlight due to increasing interest in using in-memory computing architectures to make data-driven algorithms more energy-efficient. One of the main advantages of this architecture is the efficient performance of vector-matrix multiplications while avoiding the “von Neumann bottleneck.” Despite these promises, no single material platform meets all the requirements for the fabrication of this new processor technology. Recently, flash memories based on monolayer MoS2 have been shown to achieve ultra-fast operation, overcoming one of the main drawbacks of this memory type. Together with its other characteristics, this makes them a promising candidate for the base elements of this technology. However, the question remains of how to achieve large-area ultra-fast operation of MoS2 monolayer flash memories. In this work, we will compare large-area flash memories based on MoS2 used in past realizations of in-memory systems and analyze the improvements needed to achieve ultra-fast performance for in-memory applications.","PeriodicalId":44724,"journal":{"name":"IEEE Nanotechnology Magazine","volume":"13 1","pages":"0"},"PeriodicalIF":2.3000,"publicationDate":"2023-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"How to Achieve Large-Area Ultra-Fast Operation of MoS<sub>2</sub> Monolayer Flash Memories?\",\"authors\":\"Guilherme Migliato Marega, Zhenyu Wang, Yanfei Zhao, Hyun Goo Ji, Asmund Ottesen, Mukesh Tripathi, Aleksandra Radenovic, Andras Kis\",\"doi\":\"10.1109/mnano.2023.3297118\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"Memory devices have returned to the spotlight due to increasing interest in using in-memory computing architectures to make data-driven algorithms more energy-efficient. One of the main advantages of this architecture is the efficient performance of vector-matrix multiplications while avoiding the “von Neumann bottleneck.” Despite these promises, no single material platform meets all the requirements for the fabrication of this new processor technology. Recently, flash memories based on monolayer MoS2 have been shown to achieve ultra-fast operation, overcoming one of the main drawbacks of this memory type. Together with its other characteristics, this makes them a promising candidate for the base elements of this technology. However, the question remains of how to achieve large-area ultra-fast operation of MoS2 monolayer flash memories. In this work, we will compare large-area flash memories based on MoS2 used in past realizations of in-memory systems and analyze the improvements needed to achieve ultra-fast performance for in-memory applications.\",\"PeriodicalId\":44724,\"journal\":{\"name\":\"IEEE Nanotechnology Magazine\",\"volume\":\"13 1\",\"pages\":\"0\"},\"PeriodicalIF\":2.3000,\"publicationDate\":\"2023-10-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"IEEE Nanotechnology Magazine\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/mnano.2023.3297118\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"Q3\",\"JCRName\":\"NANOSCIENCE & NANOTECHNOLOGY\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"IEEE Nanotechnology Magazine","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/mnano.2023.3297118","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"Q3","JCRName":"NANOSCIENCE & NANOTECHNOLOGY","Score":null,"Total":0}
How to Achieve Large-Area Ultra-Fast Operation of MoS2 Monolayer Flash Memories?
Memory devices have returned to the spotlight due to increasing interest in using in-memory computing architectures to make data-driven algorithms more energy-efficient. One of the main advantages of this architecture is the efficient performance of vector-matrix multiplications while avoiding the “von Neumann bottleneck.” Despite these promises, no single material platform meets all the requirements for the fabrication of this new processor technology. Recently, flash memories based on monolayer MoS2 have been shown to achieve ultra-fast operation, overcoming one of the main drawbacks of this memory type. Together with its other characteristics, this makes them a promising candidate for the base elements of this technology. However, the question remains of how to achieve large-area ultra-fast operation of MoS2 monolayer flash memories. In this work, we will compare large-area flash memories based on MoS2 used in past realizations of in-memory systems and analyze the improvements needed to achieve ultra-fast performance for in-memory applications.
期刊介绍:
IEEE Nanotechnology Magazine publishes peer-reviewed articles that present emerging trends and practices in industrial electronics product research and development, key insights, and tutorial surveys in the field of interest to the member societies of the IEEE Nanotechnology Council. IEEE Nanotechnology Magazine will be limited to the scope of the Nanotechnology Council, which supports the theory, design, and development of nanotechnology and its scientific, engineering, and industrial applications.