{"title":"用于 IEEE 1901 标准的异构和可重构解码器","authors":"Yuxing Chen;Zhongfeng Wang","doi":"10.1109/TCSI.2024.3439338","DOIUrl":null,"url":null,"abstract":"The IEEE 1901 standard plays a crucial role in the extensive fields of smart grids, electric vehicles, and the Internet of Things. The forward error correction (FEC) codes specified in this standard include low-density parity-check convolutional codes (LDPC-CCs), Reed-Solomon (RS) codes, and RS convolutional concatenated (RSCC) codes. This work proposes a low-complexity decoder fully compliant with the standard. First, a heterogeneous scheme is introduced to LDPC-CC decoding. The new scheme assigns different data formats among processing elements (PEs), which reduces the overall storage size and enables a customized datapath down to the PE level. Then, to efficiently support diverse FEC demands in the standard, a reconfigurable architecture is thoroughly explored from both memory and datapath aspects. Leveraging these techniques, the first decoder compatible with the IEEE 1901 standard is developed and implemented with 55nm technology. Implementation results demonstrate that the proposed decoder satisfies the standard’s requirements while exhibiting low hardware complexity.","PeriodicalId":13039,"journal":{"name":"IEEE Transactions on Circuits and Systems I: Regular Papers","volume":"71 10","pages":"4767-4777"},"PeriodicalIF":5.2000,"publicationDate":"2024-08-12","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"A Heterogeneous and Reconfigurable Decoder for the IEEE 1901 Standard\",\"authors\":\"Yuxing Chen;Zhongfeng Wang\",\"doi\":\"10.1109/TCSI.2024.3439338\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"The IEEE 1901 standard plays a crucial role in the extensive fields of smart grids, electric vehicles, and the Internet of Things. The forward error correction (FEC) codes specified in this standard include low-density parity-check convolutional codes (LDPC-CCs), Reed-Solomon (RS) codes, and RS convolutional concatenated (RSCC) codes. This work proposes a low-complexity decoder fully compliant with the standard. First, a heterogeneous scheme is introduced to LDPC-CC decoding. The new scheme assigns different data formats among processing elements (PEs), which reduces the overall storage size and enables a customized datapath down to the PE level. Then, to efficiently support diverse FEC demands in the standard, a reconfigurable architecture is thoroughly explored from both memory and datapath aspects. Leveraging these techniques, the first decoder compatible with the IEEE 1901 standard is developed and implemented with 55nm technology. Implementation results demonstrate that the proposed decoder satisfies the standard’s requirements while exhibiting low hardware complexity.\",\"PeriodicalId\":13039,\"journal\":{\"name\":\"IEEE Transactions on Circuits and Systems I: Regular Papers\",\"volume\":\"71 10\",\"pages\":\"4767-4777\"},\"PeriodicalIF\":5.2000,\"publicationDate\":\"2024-08-12\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"IEEE Transactions on Circuits and Systems I: Regular Papers\",\"FirstCategoryId\":\"5\",\"ListUrlMain\":\"https://ieeexplore.ieee.org/document/10633815/\",\"RegionNum\":1,\"RegionCategory\":\"工程技术\",\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"Q1\",\"JCRName\":\"ENGINEERING, ELECTRICAL & ELECTRONIC\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"IEEE Transactions on Circuits and Systems I: Regular Papers","FirstCategoryId":"5","ListUrlMain":"https://ieeexplore.ieee.org/document/10633815/","RegionNum":1,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"Q1","JCRName":"ENGINEERING, ELECTRICAL & ELECTRONIC","Score":null,"Total":0}
A Heterogeneous and Reconfigurable Decoder for the IEEE 1901 Standard
The IEEE 1901 standard plays a crucial role in the extensive fields of smart grids, electric vehicles, and the Internet of Things. The forward error correction (FEC) codes specified in this standard include low-density parity-check convolutional codes (LDPC-CCs), Reed-Solomon (RS) codes, and RS convolutional concatenated (RSCC) codes. This work proposes a low-complexity decoder fully compliant with the standard. First, a heterogeneous scheme is introduced to LDPC-CC decoding. The new scheme assigns different data formats among processing elements (PEs), which reduces the overall storage size and enables a customized datapath down to the PE level. Then, to efficiently support diverse FEC demands in the standard, a reconfigurable architecture is thoroughly explored from both memory and datapath aspects. Leveraging these techniques, the first decoder compatible with the IEEE 1901 standard is developed and implemented with 55nm technology. Implementation results demonstrate that the proposed decoder satisfies the standard’s requirements while exhibiting low hardware complexity.
期刊介绍:
TCAS I publishes regular papers in the field specified by the theory, analysis, design, and practical implementations of circuits, and the application of circuit techniques to systems and to signal processing. Included is the whole spectrum from basic scientific theory to industrial applications. The field of interest covered includes: - Circuits: Analog, Digital and Mixed Signal Circuits and Systems - Nonlinear Circuits and Systems, Integrated Sensors, MEMS and Systems on Chip, Nanoscale Circuits and Systems, Optoelectronic - Circuits and Systems, Power Electronics and Systems - Software for Analog-and-Logic Circuits and Systems - Control aspects of Circuits and Systems.