纳米片NMOSFET晶体管效率与单位增益频率的折衷实验分析

V. Silva, João V. C. Leal, W. Perina, J. Martino, E. Simoen, A. Veloso, P. Agopian
{"title":"纳米片NMOSFET晶体管效率与单位增益频率的折衷实验分析","authors":"V. Silva, João V. C. Leal, W. Perina, J. Martino, E. Simoen, A. Veloso, P. Agopian","doi":"10.29292/jics.v17i1.550","DOIUrl":null,"url":null,"abstract":"This work presents a trade-off analysis between transistor efficiency (gm/ID which is proportional to the intrinsic voltage gain Av) and the unit gain frequency (fT) of nanosheet (NSH) NMOS devices for temperatures from room temperature down to -100 °C. The analyses were performed experimentally as a function of the inversion coefficient (IC) in order to determine the optimal application region for optimization of both parameters. These analyses were performed with NSH NMOS for channel lengths of 28 nm, 70 nm and 200 nm. It was observed that the optimal operation point takes place in the transition between moderate and strong inversion (IC=10) for the three analyzed temperatures, where the highest value obtained for gm/ID x fT was found. In this optimum bias point the AV is 45 dB (L=200 nm) and 39 dB (L=28 nm) and fT is 9 GHz (L=200 nm) and 186 GHz (L=28nm) both for T=25 °C, which should be suitable for many applications.","PeriodicalId":39974,"journal":{"name":"Journal of Integrated Circuits and Systems","volume":" ","pages":""},"PeriodicalIF":0.0000,"publicationDate":"2022-04-30","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"Experimental Analysis of Trade-Off Between Transistor Efficiency and Unit Gain Frequency of Nanosheet NMOSFET down to -100 oC\",\"authors\":\"V. Silva, João V. C. Leal, W. Perina, J. Martino, E. Simoen, A. Veloso, P. Agopian\",\"doi\":\"10.29292/jics.v17i1.550\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"This work presents a trade-off analysis between transistor efficiency (gm/ID which is proportional to the intrinsic voltage gain Av) and the unit gain frequency (fT) of nanosheet (NSH) NMOS devices for temperatures from room temperature down to -100 °C. The analyses were performed experimentally as a function of the inversion coefficient (IC) in order to determine the optimal application region for optimization of both parameters. These analyses were performed with NSH NMOS for channel lengths of 28 nm, 70 nm and 200 nm. It was observed that the optimal operation point takes place in the transition between moderate and strong inversion (IC=10) for the three analyzed temperatures, where the highest value obtained for gm/ID x fT was found. In this optimum bias point the AV is 45 dB (L=200 nm) and 39 dB (L=28 nm) and fT is 9 GHz (L=200 nm) and 186 GHz (L=28nm) both for T=25 °C, which should be suitable for many applications.\",\"PeriodicalId\":39974,\"journal\":{\"name\":\"Journal of Integrated Circuits and Systems\",\"volume\":\" \",\"pages\":\"\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2022-04-30\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"Journal of Integrated Circuits and Systems\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.29292/jics.v17i1.550\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"Q4\",\"JCRName\":\"Engineering\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"Journal of Integrated Circuits and Systems","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.29292/jics.v17i1.550","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"Q4","JCRName":"Engineering","Score":null,"Total":0}
引用次数: 0

摘要

这项工作提出了晶体管效率(gm/ID,与固有电压增益Av成正比)和纳米片(NSH) NMOS器件的单位增益频率(fT)之间的权衡分析,温度从室温降至-100°C。实验分析了反演系数(IC)的函数,以确定两个参数优化的最佳应用区域。这些分析是用NSH NMOS进行的,通道长度为28 nm, 70 nm和200 nm。结果表明,三种分析温度的最佳工作点发生在中等和强反转(IC=10)之间的转变,其中gm/ID x fT的值最高。在此最佳偏置点,当温度为25°C时,AV分别为45 dB (L=200 nm)和39 dB (L=28nm), fT分别为9 GHz (L=200 nm)和186 GHz (L=28nm),这应该适用于许多应用。
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Experimental Analysis of Trade-Off Between Transistor Efficiency and Unit Gain Frequency of Nanosheet NMOSFET down to -100 oC
This work presents a trade-off analysis between transistor efficiency (gm/ID which is proportional to the intrinsic voltage gain Av) and the unit gain frequency (fT) of nanosheet (NSH) NMOS devices for temperatures from room temperature down to -100 °C. The analyses were performed experimentally as a function of the inversion coefficient (IC) in order to determine the optimal application region for optimization of both parameters. These analyses were performed with NSH NMOS for channel lengths of 28 nm, 70 nm and 200 nm. It was observed that the optimal operation point takes place in the transition between moderate and strong inversion (IC=10) for the three analyzed temperatures, where the highest value obtained for gm/ID x fT was found. In this optimum bias point the AV is 45 dB (L=200 nm) and 39 dB (L=28 nm) and fT is 9 GHz (L=200 nm) and 186 GHz (L=28nm) both for T=25 °C, which should be suitable for many applications.
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来源期刊
Journal of Integrated Circuits and Systems
Journal of Integrated Circuits and Systems Engineering-Electrical and Electronic Engineering
CiteScore
0.90
自引率
0.00%
发文量
39
期刊介绍: This journal will present state-of-art papers on Integrated Circuits and Systems. It is an effort of both Brazilian Microelectronics Society - SBMicro and Brazilian Computer Society - SBC to create a new scientific journal covering Process and Materials, Device and Characterization, Design, Test and CAD of Integrated Circuits and Systems. The Journal of Integrated Circuits and Systems is published through Special Issues on subjects to be defined by the Editorial Board. Special issues will publish selected papers from both Brazilian Societies annual conferences, SBCCI - Symposium on Integrated Circuits and Systems and SBMicro - Symposium on Microelectronics Technology and Devices.
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