{"title":"服务器互操作性和优化","authors":"M. Kamm, H. Jun, L. Boluna","doi":"10.1109/MDT.2012.2201910","DOIUrl":null,"url":null,"abstract":"As SerDes use in system-level applications increases, interoperability and overall system optimization become greater challenges. This work presents a solution to these problems utilizing the combination of embedded link transmit and receive tests via system diagnostics software layer, JTAG, and the upcoming IEEE P1687 standard.","PeriodicalId":50392,"journal":{"name":"IEEE Design & Test of Computers","volume":null,"pages":null},"PeriodicalIF":0.0000,"publicationDate":"2012-06-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://sci-hub-pdf.com/10.1109/MDT.2012.2201910","citationCount":"1","resultStr":"{\"title\":\"SerDes Interoperability and Optimization\",\"authors\":\"M. Kamm, H. Jun, L. Boluna\",\"doi\":\"10.1109/MDT.2012.2201910\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"As SerDes use in system-level applications increases, interoperability and overall system optimization become greater challenges. This work presents a solution to these problems utilizing the combination of embedded link transmit and receive tests via system diagnostics software layer, JTAG, and the upcoming IEEE P1687 standard.\",\"PeriodicalId\":50392,\"journal\":{\"name\":\"IEEE Design & Test of Computers\",\"volume\":null,\"pages\":null},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2012-06-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"https://sci-hub-pdf.com/10.1109/MDT.2012.2201910\",\"citationCount\":\"1\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"IEEE Design & Test of Computers\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/MDT.2012.2201910\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"IEEE Design & Test of Computers","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/MDT.2012.2201910","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
As SerDes use in system-level applications increases, interoperability and overall system optimization become greater challenges. This work presents a solution to these problems utilizing the combination of embedded link transmit and receive tests via system diagnostics software layer, JTAG, and the upcoming IEEE P1687 standard.
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