{"title":"块数字滤波器的舍入噪声分析以级联形式实现","authors":"Uipil Chong, Soon-Jong Kim","doi":"10.1109/APCAS.1996.569271","DOIUrl":null,"url":null,"abstract":"The block processing algorithm is suitable for high speed implementation of digital filters on parallel processing systems. Roundoff noise is guided via the internal structure of the block filter using a state variable formulation. In this paper, we calculate and compare output roundoff noise gain for various block filter structures, which have not been investigated yet.","PeriodicalId":20507,"journal":{"name":"Proceedings of APCCAS'96 - Asia Pacific Conference on Circuits and Systems","volume":null,"pages":null},"PeriodicalIF":0.0000,"publicationDate":"1996-11-18","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"The roundoff noise analysis for block digital filters realized in cascade form\",\"authors\":\"Uipil Chong, Soon-Jong Kim\",\"doi\":\"10.1109/APCAS.1996.569271\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"The block processing algorithm is suitable for high speed implementation of digital filters on parallel processing systems. Roundoff noise is guided via the internal structure of the block filter using a state variable formulation. In this paper, we calculate and compare output roundoff noise gain for various block filter structures, which have not been investigated yet.\",\"PeriodicalId\":20507,\"journal\":{\"name\":\"Proceedings of APCCAS'96 - Asia Pacific Conference on Circuits and Systems\",\"volume\":null,\"pages\":null},\"PeriodicalIF\":0.0000,\"publicationDate\":\"1996-11-18\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"Proceedings of APCCAS'96 - Asia Pacific Conference on Circuits and Systems\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/APCAS.1996.569271\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"Proceedings of APCCAS'96 - Asia Pacific Conference on Circuits and Systems","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/APCAS.1996.569271","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
The roundoff noise analysis for block digital filters realized in cascade form
The block processing algorithm is suitable for high speed implementation of digital filters on parallel processing systems. Roundoff noise is guided via the internal structure of the block filter using a state variable formulation. In this paper, we calculate and compare output roundoff noise gain for various block filter structures, which have not been investigated yet.
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