A dual-band 802.11abgn/ac transceiver with integrated PA and T/R switch in a digital noise controlled SoC

This paper describes a dual-band 802.11abgn/ac compliant transceiver in a 4-in-l combo connectivity SoC. It integrates the PAs, LNAs, T/R switches, and the 5GHz Balun. Due to the transmitter architecture and adaptive biasing scheme both are tailored for wide bandwidth, the 5GHz transmitter achieves 18.2dBm average output power for 802.11ac VHT80 MCS9 (Modulation and Coding Scheme 9). Within the 80MHz channel bandwidth, the IQ mismatch becomes frequency dependent, and is compensated through calibration. In the 2.4GHz transmitter, its PA load-line is adjustable. The power efficiency is thus remained similarly regardless the output power is at 20dBm for long range operation, or 8dBm for short range operation. By controlling the turn-on resistance of power island switch in digital baseband, and properly sizing the filler cap, the switching noise can be well controlled. The chip occupies 24.9mm2 in 55nm 1P6M CMOS technology, where 1.3mm2 is for 5GHz WLAN and 2.1mm2 is for 2.4GHz WLAN/BT.