实时DSP为100+ Gb/s

Christian Rasmussen, Y. Pan, M. Aydinlik, M. Crowley, J. Geyer, P. Humblet, F. Liu, B. Mikkelsen, P. Monsen, N. Nadarajah, G. Pendock, B. Shah
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引用次数: 24

摘要

我们讨论了100G相干接口的商业背景和技术要求,并说明了ASIC设计决策和挑战,以及超越100G。
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Real-time DSP for 100+ Gb/s
We discuss the commercial context and technical requirements to 100G coherent interfaces and illustrate ASIC design decisions and challenges, looking beyond 100G as well.
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