Yung-Ting Hsieh, Khizar Anjum, Songjun Huang, Indraneel S. Kulkarni, D. Pompili
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引用次数: 4
摘要
近年来,基于电阻处理单元(RPU)的体系结构因其具有加速神经网络训练的潜力而成为一个热门话题。然而,试图实现基于非易失性存储器技术的RPU概念面临着无数的技术和物理限制。横杆阵列的理论概念几乎不可能在现实世界中实现,如果没有一定的调整。因此,我们提出了一种基于CMOS (Voltage output Complementary Metal Oxide Semiconductor)的RPU设计VRPU,用于构建神经网络。我们还介绍了一种新的基于二极管的非线性激活函数电路,它由单个二极管(D)和二极管对(DP)组成。利用MNIST数据集对ReLU+Sigmoid、D+Sigmoid、ReLU+DP、D+DP(低温)和D+DP(高温)的隐藏层和输出层组合进行了测试,准确率分别为94.29%、95.90%、95.53%、96.75%和96.57%,验证了所提VRPU设计的优点。
Neural Network Design via Voltage-based Resistive Processing Unit and Diode Activation Function - A New Architecture
In recent years, the architecture based on Resistive Processing Unit (RPU) has become a hot topic due to its potential to accelerate training of a Neural Network (NN). However, attempts to realize the RPU concept based on non-volatile memory technology face a myriad of technological and physical constraints. The theoretical concept of crossbar array is nearly impossible to implement in the real world without certain tweaks. Hence, we propose an Voltage output Complementary Metal Oxide Semiconductor (CMOS)-based RPU design VRPU, which is used to build a neural network. We also introduce a novel diode-based circuit to behave as a non-linear activation function, which consists of a single Diode (D) and Diode Pair (DP). The proposed VRPU design when tested with MNIST dataset for hidden layer and output layer combinations of ReLU+Sigmoid, D+Sigmoid, ReLU+DP, D+DP (low temperature) and D+DP (high temperature) resulted in accuracies of 94.29%, 95.90%, 95.53%, 96.75% and 96.57% respectively corroborating the merits of the proposed design.