A 12Gb/s 39dB loss-recovery unclocked-DFE receiver with bi-dimensional equalization

Backplane communications are rapidly moving beyond 10 Gb/s both in networking and in hard-disk drive interconnection. Decision Feedback Equalization (DFE) and Duobinary (DB) prove to be effective techniques assuring signal integrity in the presence of ISI, but with speed increase the accuracy of the timing recovery brings additional challenges. Half-rate clock DFEs by loop-unrolling are widely applied to avoid feeding back the decided bit within a 1-bit (UI) time, but the alternated eye opening that is created requires an increased circuit complexity to obtain the maximum accuracy in timing recovery [1][2][3]. DB alternative may suffer in the presence of long sequences of incoming toggle patterns (1010…). In fact, in DB the channel frequency response is pre-shaped into a target shape, but toggle patterns are converted into a constant level, thus not providing information to the timing loop [2][4].