Approximate Energy Recovery 4-2 Compressor for Low-Power Sub-GHz IoT Applications

Approximate computing is a circuit design technique that reduces area and power dissipation at the cost of accurate results. In this paper, we have investigated to further reduce the power dissipation of approximate circuits while maintaining high speeds using a form of energy recovery (ER) computing known as Pulse Boost Logic (PBL). To demonstrate power savings and speed capabilities, we have constructed an approximate 4-2 compressor circuit using PBL based ER computing. Simulations were performed using 45nm technology in Cadence Spectre. At 800 MHz, our results show the average power saving of 64% in PBL based approximate 4-2 compressor design compared to its standard CMOS based design. We also illustrate that the power saving of 89% can be achieved in 4-2 compressor by combining approximate and ER computing compared to CMOS based design of accurate 4-2 compressor. Further, we illustrate that the PBL based proposed approximate 4-2 compressor has 65% less energy consumption than the CMOS based approximate 4-2 compressor. We have verified the functionality of the proposed PBL based approximate 4-2 compressor up to 1 GHz to illustrate its application in low-power and low-energy Sub-GHz IoT applications.