Design of a power-scalable digital least-means-square adaptive filter

Abstract

Channel equalization is a required function in many high speed communication systems. As a result of the high performance requirements and complexity, adaptive equalization filters require significant power. These filters are often implemented in hardware rather than software on a DSP. A power scalable adaptive equalizer is presented where the power scales with the required precision through the use of dynamic tap length and bit precision. Using these techniques, a power reduction from 20.4 mW in a fixed length and bit precision filter to a minimum of 6.4 mW is demonstrated.